Πλοήγηση ανά Θέμα "Upper Bound"

Black hole search with finite automata scattered in a synchronous torus

Chalopin, J.; Das, S.; Labourel, A.; Markou, E. (2011)

We consider the problem of locating a black hole in synchronous anonymous networks using finite state agents. A black hole is a harmful node in the network that destroys any agent visiting that node without leaving any ...

Broadcast erasure channel with feedback-capacity and algorithms

Georgiadis, L.; Tassiulas, L. (2009)

We consider the two-user broadcast erasure channel where feedback in the form of ack messages is fed back to the transmitter. We provide an upper bound to the capacity region of this system. We then present two algorithms ...

Geometrical bounds on the efficiency of wireless network coding

Mannersalo, P.; Paschosy, G. S.; Gkatzikis, L. (2013)

This paper explores wireless network coding both in case of deterministic and random point patterns. Using the Boolean connectivity model we provide upper bounds for the maximum encoding number, i.e., the number of packets ...

Graph-based STA for asynchronous controllers

Simoglou S., Xiromeritis N., Sotiriou C., Sketopoulos N. (2020)

We present a Graph-based Asynchronous Static Timing Analysis (ASTA) methodology for Asynchronous Control Circuits, which pessimistically computes Critical Cycle(s), instead of Critical Paths, without cycle cutting. Its ...

Sharp bounds on the spectral radius of nonnegative matrices and comparison to the frobenius’ bounds

Adam M., Assimakis N., Babouklis F. (2020)

In this paper, a new upper bound and a new lower bound for the spectral radius of a nοnnegative matrix are proved by using similarity transformations. These bounds depend only on the elements of the nonnegative matrix and ...

Static Timing Analysis Induced Simulation Errors for Asynchronous Circuits

Simoglou S., Sotiriou C., Blias N. (2021)

In this paper, we demonstrate that conventional Static Timing Anaysis (STA) based, functional, gate-level simulation of asynchronous circuits with cycles is only as accurate as the STA engine used. This is, firstly because ...

Timing errors in sta-based gate-level simulation

Simoglou S., Sotiriou C., Blias N. (2020)

In this paper, we demonstrate that conventional STA-based, functional, gate-level simulation of asynchronous circuits with cycles is only as accurate as the STA engine used. This is, firstly because cycle cuts create local ...